Copper Plating R&D for 3D Integration Technology

Atotech's Partnership with SEMATECH International

Atotech's partnership with SEMATECH International focuses on the development of advanced copper plating process technologies for the 3D stacking of integrated circuit (IC) devices in order to fulfill the semiconductor industry's needs for the increased performance and efficiency of smaller devices, at significantly lower costs. Atotech joined SEMATECH's 3D Integration Program as the only materials supplier to develop high aspect ratio (AR) through silicon via (TSV) technology. 

As a member of SEMATECH, Atotech participates in leading edge research towards the development and implementation of cost-effective copper electroplating solutions for TSV technology for wafer-to-wafer, die-to-die and die-to-wafer 3D integration applications. Atotech contributes to the R&D with cost-competitive, innovative chemistries and plating know-how. Atotech benefits from the collaborations and expertise of SEMATECH's global partners, and has access to joint results including electrical characterization data, early reliability test data, and module developments. 

The 3D Program has its own clean room at CNSE which houses a variety of 3D equipment including a 300 mm NEXX Stratus ECD plating tool which is used by Atotech for TSV plating process development. The initial focus of the R&D is on high aspect ratio (AR) TSV structures, with target geometries of 5 x 25 μm and 5 x 50 μm. The electrical characterization data and early reliability data generated for the experiments enable the R&D teams to analyze results and improve the process for best TSV performance.

About SEMATECH

For 20 years, SEMATECH® (www.sematech.org) has set global direction, enabled flexible collaboration, and bridged strategic R&D to manufacturing. Today, we continue accelerating the next technology revolution with our nanoelectronics and emerging technology partners. 

For more information, please visit the company's website at www.sematech.org.